SHOWALL FUN PRANKS HIGH VOLTAGE LAZARUS-64 PHOTOGRAPHY SPY GADGETS VIDEO GAME
Figure 24 - Bouncing an 80 x 80 ball around the screen
Figure 24 - Bouncing an 80 x 80 ball around the screen

The boring square block test made earlier was made a little more interesting by replacing the mono color cube with a shaded ball and adding a moving rainbow background to display all 256 colors. This huge 80 x 80 "sprite" was drawn in Photoshop and then converted to data statements to be added into the AVR 324 program memory. The Ball Bouncer demo simply moves these bytes to the back buffer after drawing the rainbow and then issues a "Flip" command to the VMS to create the animation. Typically, a video game would be made up of many smaller sprites, but Lazarus-64 has more than enough power to move many huge sprites around the screen at a full 60 frames per second. To achieve transparency with the background or any other sprites, one of the colors in the sprite is simply ignored, so it becomes an "Alpha Color".

< Here is the Ball Bouncer host code>



The large ball sprite has 6400 pixels, so that is a lot of data to move in 1/60th of a second! Actually, when you consider the background rainbow, which is 224 x 200 pixels, and the large sprite, that is more than 51 thousand pixels that need to be transferred to the back buffer in less than 1/60th of a second in order to keep up to 60 frames per second! Without the VMS allowing the host have full access to the non displayed Video memory, this task would be impossible, but Lazarus-64 could easily handle many more times this number of pixels and not skip a frame or move to the next lowest frame rate. A video game system that attempts to cram the entire pixel drawing time into the blanking times would never come close to moving so much data in such a short time. We will have power!



Figure 25 - The data bus switch from the host processor
Figure 25 - The data bus switch from the host processor

One of the other parts of the VMS that has not been mentioned is the data bus switch, which includes a pair of 74LS245 bi-directional buffers and another 74HC157 to switch the output enable (OE) and write enable (WE) from the host processor to the dual memory banks. Each 74HC245 takes one of the memory data busses and then combines them into one bi-direction input/output which is fed to the host processor. The direction of the bus traffic is controlled by the state of the output enable pin, making the switch seem like a single bank of memory.

It was necessary to use the 74HC245 buffers in this part of the VMS as traffic is bi-directional from the host processor data bus into the memory banks. To write to the memory, the AVR sets the data port for output and then sets the OE and WE pins accordingly. To read from the memory, the processor port is set as an input, and then data is read after a small delay to allow the turnaround cycle to complete. This bus turnaround cycle is necessary when switching an AVR from output to input in order to avoid a bogus data reading. At 20MHz, only 2 dead cycles (NOPs) are needed, so it's not a lot of wasted time.

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