; ********************************************************************************************************
; ********** NIKON CLAP & SNAP : (C) 2008 BY RADBRAD FOR LUCIDSCIENCE.COM
; ********** TARGET : ATMEGA-88P WITH INTERNAL OSCILLATOR AT 8 MHZ
; ********************************************************************************************************

; ATMEGA88 DEFINITION
.include "m88def.inc"

; ********************************************************************************************************
; ********** REGISTER DEFINITIONS
; ********************************************************************************************************

.def t1 = r16
.def t2 = r17
.def t3 = r18
.def t4 = r19
.def clap = r20
.def reps = r21
.def lctr1 = r22
.def lctr2 = r23
.def wctr1 = r24
.def wctr2 = r25

; ********************************************************************************************************
; ********** RESET AND INTERRUPT VECTORS
; ********************************************************************************************************

; RESET VECTOR
reset:
rjmp startup
startup:

; STACK POINTER
ldi t1 ,low(ramend)
out spl,t1
ldi t1 ,high(ramend)
out sph,t1

; ********************************************************************************************************
; ********** ADC AND IO PORT SETUP
; ********************************************************************************************************

; MICROPHONE ANALOG INPUT
cbi ddrc,0
cbi portc,0

; RED STATUS LED
sbi ddrb,0

; BLUE STATUS LED
sbi ddrd,7

; GREEN STATUS LED
sbi ddrd,6

; INFRARED OUTPUT LED
sbi ddrd,5

; PIEZO BUZZER OUTPUT
sbi ddrd,0

; AUTO SWITCH INPUT
cbi ddrd,1

; SETUP ADC FOR FREE RUNNING
lds t1,ADMUX
cbr t1,(1<<REFS1)
cbr t1,(1<<REFS0)
sbr t1,(1<<ADLAR)
cbr t1,(1<<MUX3)
cbr t1,(1<<MUX2)
cbr t1,(1<<MUX1)
cbr t1,(1<<MUX0)
sts ADMUX,t1
lds t1,ADCSRA
sbr t1,(1<<ADEN)
cbr t1,(1<<ADATE)
cbr t1,(1<<ADIE)
sbr t1,(1<<ADPS2)
cbr t1,(1<<ADPS1)
cbr t1,(1<<ADPS0)
sts ADCSRA,t1

; ********************************************************************************************************
; ********** STARTUP AND INITIALIZATION
; ********************************************************************************************************

; FLASH LEDS AND BEEP ON STARTUP
rcall delay
sbi portb,0
sbi portd,7
sbi portd,6
rcall beeper
rcall delay
cbi portb,0
cbi portd,7
cbi portd,6

; RESET REGISTERS
clr t1
clr t2
clr t3
clr clap
clr reps
clr lctr1
clr lctr2
clr wctr1
clr wctr2
clr xl
clr xh

; ********************************************************************************************************
; ********** MAIN LOOP
; ********************************************************************************************************

main:

; RUN AUTO MODE IF AUTO SWITCH IS ON
sbic pind,1
rjmp aut1

; 10 SECOND AUTO TIMER DELAY FLASH
ldi t1,4
adl:
sbi portb,0
sbi portd,7
rcall delay
cbi portb,0
cbi portd,7
rcall delay
dec t1
brne adl

; COMPLETE DELAY AND TAKE PHOTO
sbi portd,6
rcall beeper
rcall delay
rcall photosnap
cbi portd,6
rjmp main
aut1:

; READ ADC INPUT VALUE AND SET CLAP REGISTER
lds t1,ADCSRA
sbr t1,(1<<ADSC)
sts ADCSRA,t1
adcloop:
lds t1,ADCSRA
sbrc t1,ADSC
rjmp adcloop
lds clap,ADCH

; CLAP DETECTION LED CONTROL & COUNT REPS
cpi clap,150
brne cdl1
sbi portb,0
ldi lctr1,20
ldi lctr2,255
cdl1:
cpi lctr1,0
breq cdl2
dec lctr2
brne cdl2
dec lctr1
cdl2:
cpi lctr1,0
brne cdl3
sbic pinb,0
inc reps
cbi portb,0
cdl3:

; TRIPLE CLAP DETECT WINDOW LED CONTROL
cpi clap,150
brne dwl1
sbi portd,7
ldi wctr1,255
ldi wctr2,255
dwl1:
cpi wctr1,0
breq dwl2
dec wctr2
brne dwl2
dec wctr1
dwl2:
cpi wctr1,0
brne dwl3
clr reps
cbi portd,7
dwl3:

; DETECT THIRD CLAP AND TAKE PHOTO
cpi reps,3
brne tcv1
clr reps
clr lctr1
clr lctr2
clr wctr1
clr wctr2
cbi portd,6
cbi portd,7
sbi portd,6
rcall beeper
rcall delay
rcall photosnap
rcall delay
cbi portd,6
tcv1:

; CONTINUE WITH MAIN LOOP
rjmp main

; ********************************************************************************************************
; ********** ONE SECOND DELAY ROUTINE
; ********************************************************************************************************

delay:
ldi yl,40
dly1:
ldi xh,high(60000)
ldi xl,low(60000) 
dly2:
sbiw xl,1
brne dly2
dec yl
brne dly1
ret

; ********************************************************************************************************
; ********** PIEZO BEEPER
; ********************************************************************************************************

beeper:

; BEEP TONE 1
ldi t1,100
bp1:
sbi portd,0
ldi xh,high(1500)
ldi xl,low(1500)
bp2:
sbiw xl,1
brne bp2
cbi portd,0
ldi xh,high(1500)
ldi xl,low(1500)
bp3:
sbiw xl,1
brne bp3
dec t1
brne bp1

; BEEP TONE 2
ldi t1,100
bp4:
sbi portd,0
ldi xh,high(1200)
ldi xl,low(1200)
bp5:
sbiw xl,1
brne bp5
cbi portd,0
ldi xh,high(1200)
ldi xl,low(1200)
bp6:
sbiw xl,1
brne bp6
dec t1
brne bp4

; BEEP TONE 3
ldi t1,100
bp7:
sbi portd,0
ldi xh,high(1000)
ldi xl,low(1000)
bp8:
sbiw xl,1
brne bp8
cbi portd,0
ldi xh,high(1000)
ldi xl,low(1000)
bp9:
sbiw xl,1
brne bp9
dec t1
brne bp7
ret

; ********************************************************************************************************
; ********** NIKON REMOTE CONTROL SHUTTER SIGNAL
; ********************************************************************************************************

photosnap:
ldi t3,2
snaploop:

; CYCLE 1 = 16000 CLK MOD
ldi t1,77
c1:
sbi portd,5
ldi t2,33
m1:
dec t2
brne m1
nop
nop
nop
cbi portd,5
ldi t2,33
m2:
dec t2
brne m2
nop
nop
nop
dec t1
brne c1
nop

; CYCLE 2 = 222640 CLK PAUSE
ldi xh,high(22264)
ldi xl,low(22264)
dl1:
nop
nop
nop
nop
nop
nop
sbiw xl,1
brne dl1

; CYCLE 3 = 3120 CLK MOD
ldi t1,15
c2:
sbi portd,5
ldi t2,33
m3:
dec t2
brne m3
nop
nop
nop
cbi portd,5
ldi t2,33
m4:
dec t2
brne m4
nop
nop
nop
dec t1
brne c2
nop

; CYCLE 4 = 12640 CLK PAUSE
ldi xh,high(1264)
ldi xl,low(1264)
dl3:
nop
nop
nop
nop
nop
nop
sbiw xl,1
brne dl3

; CYCLE 5 = 3360 CLK MOD
ldi t1,16
c3:
sbi portd,5
ldi t2,33
m5:
dec t2
brne m5
nop
nop
nop
cbi portd,5
ldi t2,33
m6:
dec t2
brne m6
nop
nop
nop
dec t1
brne c3
nop

; CYCLE 6 = 28640 CLK PAUSE
ldi xh,high(2864)
ldi xl,low(2864)
dl4:
nop
nop
nop
nop
nop
nop
sbiw xl,1
brne dl4

; CYCLE 7 = 3200 CLK MOD
ldi t1,15
c4:
sbi portd,5
ldi t2,33
m7:
dec t2
brne m7
nop
nop
nop
cbi portd,5
ldi t2,33
m8:
dec t2
brne m8
nop
nop
nop
dec t1
brne c4
nop

; CYCLE 8 = 505600 CLK PAUSE
ldi xh,high(50560)
ldi xl,low(50560)
dl5:
nop
nop
nop
nop
nop
nop
sbiw xl,1
brne dl5

; CYCLE 8 = 505600 CLK PAUSE
dl6:
nop
nop
nop
nop
nop
nop
sbiw xl,1
brne dl6

; REPEAT SEQUENCE TWICE
dec t3
sbrs t3,0
rjmp snaploop
ret

ldi xh,high(50560)
ldi xl,low(50560)